电子与信息学报
   
  
   Home  |  About Journal  |  Ethics Statement  |  Editorial Board  |  Instruction  |  Subscriptions  |  Contacts Us  |  Message  |  Chinese
电子与信息学报
OFFICE ONLINE
 ·Author Center
 ·Peer Review
 ·Editor Work
 ·Office Work
 ·Editor-in-chief
 
JOURNAL
 ·Forthcoming Articles
 ·Current Issue
 ·Next Issue
 ·Archive
 ·Advanced Search
 ·Archive By Volume
 ·Archive By Subject
 ·Email Alert
 ·
 
Hot Paper
 ·Top Cited
 ·TOP Read Articles
 ·TOP Download Articles
 
Other articles related with "TN4":
743 ZHONG Jingxin, WANG Jianye, KAN Baoqiang
  Hardware Trojan Detection Through Temperature Characteristics Analysis
    JEIT   2018 Vol.40 (3): 743-749 [Abstract] (135) [HTML 1 KB] [PDF 3615 KB] (482)
2755 ZHANG Jingbo, YANG Zhiping, PENG Chunyu, DING Penghui, WU Xiulong
  Study on the Effect of Upset and Recovery for SRAM Under the Varying Parameters of PMOS Transistor
    JEIT   2017 Vol.39 (11): 2755-2762 [Abstract] (161) [HTML 1 KB] [PDF 1271 KB] (444)
2487 DAI Zibin, YI Suwen, LI Wei, NAN Longmei
  Research and Design of Efficient Parallel Processing Architecture for Elliptic Curve Cryptographic Processor
    JEIT   2017 Vol.39 (10): 2487-2494 [Abstract] (168) [HTML 1 KB] [PDF 1273 KB] (452)
2520 ZHANG Zhang, ZHOU Yucheng, LIU Juncheng, CHENG Xin, XIE Guangjun
  A Novel Low Power Consumption Soft Error-tolerant Latch
    JEIT   2017 Vol.39 (10): 2520-2525 [Abstract] (106) [HTML 1 KB] [PDF 236 KB] (394)
2266 LIU Tieqiao, NIU Xiaoyan, YANG Jie, MAO Feng
  An Efficient Mixed-mode Test-Per-Clock Scheme
    JEIT   2017 Vol.39 (9): 2266-2271 [Abstract] (84) [HTML 1 KB] [PDF 500 KB] (339)
1634 LI Yan, HU Jianhao, YANG Zeguo
  Fault-tolerant Analysis for Feedback Based Digital Circuit via Probabilistic CMOS Model
    JEIT   2017 Vol.39 (7): 1634-1639 [Abstract] (131) [HTML 1 KB] [PDF 1421 KB] (505)
1640 WANG Zhen, JIANG Jianhui, CHEN Naijin
  Bias Temperature Instability-aware Soft Error Rate Analysis
    JEIT   2017 Vol.39 (7): 1640-1645 [Abstract] (159) [HTML 1 KB] [PDF 321 KB] (572)
1458 LI Bing, TU Yunjing, CHEN Shuai, JI Jianhua
  Efficient Design of Truly Random Seed Generator Based on SRAM Physical Unclonable Functions
    JEIT   2017 Vol.39 (6): 1458-1463 [Abstract] (117) [HTML 1 KB] [PDF 722 KB] (578)
1464 HUANG Zhengfeng, WANG Shichao, OUYANG Yiming, YI Maoxiang, LIANG Huaguo
  Low Power Soft Error Tolerant Latch for 40 nm CMOS Technology
    JEIT   2017 Vol.39 (6): 1464-1471 [Abstract] (153) [HTML 1 KB] [PDF 1304 KB] (695)
1472 SHI Zhan, YU Jun, TANG Zhen’an, CAI Hong, FENG Chong
  Design of a Low-spur Charge Pump for High Performance CMOS Phase-locked Loops
    JEIT   2017 Vol.39 (6): 1472-1478 [Abstract] (204) [HTML 1 KB] [PDF 423 KB] (500)
499 LIU Yang, YANG Yintang, LI Di, SHI Zuochen
  Body Biasing Linearization Technique for Wireless Body Area Network Transmitter
    JEIT   2017 Vol.39 (2): 499-503 [Abstract] (210) [HTML 1 KB] [PDF 948 KB] (509)
2689 CUI Xiaoping, WANG Shumin, LIU Weiqiang, DONG Wenwen
  Design of Optimized Conditional Speculative Decimal Adders CUI Xiaoping    WANG Shumin    LIU Weiqiang    DONG Wenwen
    JEIT   2016 Vol.38 (10): 2689-2694 [Abstract] (199) [HTML 1 KB] [PDF 410 KB] (641)
2397 HUANG Zhihong, LI Wei,YANG Liqun, JIANG Zhenghong, WEI Xing,LIN Yu, YANG Haigang
  An Input Crossbar Optimisation Method for And-inverter Cone Based FPGA
    JEIT   2016 Vol.38 (9): 2397-2404 [Abstract] (205) [HTML 1 KB] [PDF 1179 KB] (382)
2410 CHEN Jienan, FEI Chao, YUAN Jiansheng, ZENG Weiqi, LU Hao, HU Jianhao
  An Ultra-high-speed Fully-parallel Fast Fourier Transform Design
    JEIT   2016 Vol.38 (9): 2410-2414 [Abstract] (235) [HTML 1 KB] [PDF 923 KB] (821)
2113 LI Yue, CAI Gang, LI Tianwen, YANG Haigang
  Propagation Mechanism of Single Event Transient and Soft Error Rate Analysis Method Based on Four-value Pulse Parameters Model
    JEIT   2016 Vol.38 (8): 2113-2121 [Abstract] (210) [HTML 1 KB] [PDF 476 KB] (598)
2122 HUANG Guocheng, YIN Tao, ZHU Yuanming, XU Xiaodong, ZHANG Yachao, YANG Haigang
  A -100 dB Power Supply Rejection Ratio Non-bandgap Voltage Reference
    JEIT   2016 Vol.38 (8): 2122-2128 [Abstract] (202) [HTML 1 KB] [PDF 965 KB] (779)
1831 WU Jin, JIANG Qi, ZHENG Lixia, SUN Dongchen, SONG Ke, SUN Weifeng
  Research on Low Bit Error Rate Encoding Method for Data Latch Processing
    JEIT   2016 Vol.38 (7): 1831-1837 [Abstract] (169) [HTML 1 KB] [PDF 549 KB] (550)
827 FENG Xiao, DAI Zibin, LI Wei, CAI Luting
  Performance Model of Multicore Crypto Processor Based on Amdahl’s Law
    JEIT   2016 Vol.38 (4): 827-833 [Abstract] (273) [HTML 1 KB] [PDF 320 KB] (634)
958 WANG Jianxin, ZHU En, LIU Wensong, QI Youjie
  A New Region of Interest Coding Algorithm Based on JPEG2000 for Remote Sensing Images and Its VLSI Design
    JEIT   2016 Vol.38 (4): 958-963 [Abstract] (289) [HTML 1 KB] [PDF 2300 KB] (534)
3030 Huang Zhi-hong, Yang Hai-gang, Yang Li-qun, Li Wei, Jiang Zheng-hong, Lin Yu
  Interconnect Architecture of a Novel And-inverter Cone Based FPGA Cluster
    JEIT   2015 Vol.37 (12): 3030-3040 [Abstract] (253) [HTML 1 KB] [PDF 2640 KB] (763)
2521 Yang Li-qun, Li Wei, Huang Zhi-hong, Sun Jia-bin, Yang Hai-gang
  Circuit Characteristics-driven Semi-supervised Modelling Approach for Accelerating FPGA Design Space Exploration
    JEIT   2015 Vol.37 (10): 2521-2528 [Abstract] (244) [HTML 1 KB] [PDF 852 KB] (697)
1937 Lan Ya-zhu,Yang Hai-gang, Lin Yu
  Design of Dynamic Adaptive LDPC Decoder Based on FPGA
    JEIT   2015 Vol.37 (8): 1937-1943 [Abstract] (359) [HTML 1 KB] [PDF 339 KB] (938)
1769 Jiang Zheng-hong, Lin Yu, Huang Zhi-hong, Yang Li-qun, Yang Hai-gang
  Mapper for AIC-based FPGAs
    JEIT   2015 Vol.37 (7): 1769-1773 [Abstract] (377) [HTML 1 KB] [PDF 673 KB] (677)
468 Yu Wei, Yang Hai-Gang, Liu Yang, Huang Juan, Cai Bo-Rui, Chen Rui
  A Statistical Static Timing Analysis Incorporating Process Variations with Spatial Correlations
    JEIT   2015 Vol.37 (2): 468-476 [Abstract] (407) [HTML 1 KB] [PDF 419 KB] (800)
477 Xu Chuan-Pei, Chen Jia-Dong, Wan Chun-Ting
  Research on Test Scheduling of 3D NoC under Number Constraint of TSV (Through-Silicon-Vias) Using Evolution Algorithm Based on Cloud Model
    JEIT   2015 Vol.37 (2): 477-483 [Abstract] (365) [HTML 1 KB] [PDF 766 KB] (657)
504 Li Bing, Long Bing-Jie, Liu Yong
  A Fast Algorithm for Burrows-Wheeler Transform Using Suffix Sorting
    JEIT   2015 Vol.37 (2): 504-508 [Abstract] (433) [HTML 1 KB] [PDF 226 KB] (1386)
206 CHEN Rui, Yang Hai-Gang, Wang Fei, Jia Rui, Yu Wei
  Design of Multi-standard Discrete Cosine Transform  Based on Coarse-grained Reconfigurable Array
    JEIT   2015 Vol.37 (1): 206-213 [Abstract] (909) [HTML 1 KB] [PDF 377 KB] (616)
3027 Chen Tao, Luo Xing-Guo, LI Xiao-Nan, LI Wei
  An Architecture of Stream Based Reconfigurable Clustered Block Cipher Processing Array
    JEIT   2014 Vol.36 (12): 3027-3034 [Abstract] (848) [HTML 1 KB] [PDF 394 KB] (837)
3035 Zhi Tian, Yang Hai-Gang, Cai Gang, Qiu Xiao-Qiang, Li Tian-Wen, Wang Xin-Gang
  Study on the Prediction of Single-event Effects Induced Failure Rate for Embedded Memories
    JEIT   2014 Vol.36 (12): 3035-3041 [Abstract] (854) [HTML 1 KB] [PDF 304 KB] (825)
2536 Kong Feng, Han Guo-Dong, Shen Jian-Liang, Jian Gang
  A Novel Mesh-based Hierarchical Topology for Network-on-Chip
    JEIT   2014 Vol.36 (10): 2536-2540 [Abstract] (1184) [HTML 1 KB] [PDF 345 KB] (1445)
First page | Prev page | Next page | Last pagePage 1 of 6, 170 records
     京ICP备05002787号

© 2010 JOURNAL OF ELECTRONICS & INFORMATION TECHNOLOGY
Institute of Electronics, Chinese Academy of Sciences, P.O.Box 2702, Beijing 100190
Tel: +86-10-58887066 Fax: +86-10- 58887539,Email: jeit@mail.ie.ac.cn

Supported by:Beijing Magtech