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| A Statistical Static Timing Analysis Incorporating Process Variations with Spatial Correlations |
| Yu Wei①② Yang Hai-gang① Liu Yang① Huang Juan① Cai Bo-rui① Chen Rui①② |
①(Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China)
②(University of Chinese Academy of Sciences, Beijing 100086, China) |
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Abstract To evaluate effects of process variations on circuit delay accurately, this study proposes a Statistical Static Timing Analysis (SSTA) which incorporates process variations with spatial correlations. The algorithm applies a second order delay model that taking into account the non-Gaussian parameters - by inducting the notion of ‘conditional variables’, the 2D non-linear delay model is translated into 1D linear one; and by computing the tightness probability, mean, variance, second-order moment and sensitivity coefficients of the circuit arrival time, the sum and max operations of non-linear and non-Gaussian delay expressions are implemented. For the ISCAS89 benchmark circuits, as compared to Monte Carlo (MC) simulation, the average errors of 0.81%, -0.72%, 2.23% and -0.05%, in the mean, variance, 5% and 95% quantile points of the circuit delay are obtained respectively for the proposed method. The runtime of the proposed method is about 0.21% of the value of Monte Carlo simulation. The experimental results prove that the high accuracy of the SSTA is reliable.
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Received: 06 March 2014
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Corresponding Authors:
Yang Hai-gang
E-mail: yanghg@mail.ie.ac.cn
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2015, Vol. 37 
