椭圆曲线密码处理器的高效并行处理架构研究与设计

doi:10.11999/JEIT161380

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Abstract To overcome the common problem of low flexibility and much resource in Elliptic Curve Cryptographic (ECC) processor, a quantitative evaluation on Area-Time product (AT) for parallel processing architecture of ECC processor is proposed by statistics and modeling, and a conclusion that 3-way processing architecture is optimal can be drawn. Besides, a separated and hierarchical storage structure is exploited to strengthen the efficiency of data interaction. At the same time, a modular arithmetic unit is designed with a high level of resource reuse. Using 90 nm CMOS technology, the proposed processor occupied 1.62mm² can perform the scalar multiplication in 2.26 ms/612.4 μJ over GF(2⁵⁷¹) and 2.63 ms/665.4 μJ over GF(p₅₂₁), respectively. Compared to other works, this processor is advantageous not only in flexibility and scalability but also in making a good compromise between the hardware and the speed.

Key words： Elliptic Curve Cryptography (ECC) Parallel processing architecture Quantitative evaluation Separated and hierarchical storage structure Resource reuse

Received: 21 December 2016 Published: 26 May 2017

PACS:	TP309.7
	TN402

Fund:The National Natural Science Foundation of China (61404175)

Corresponding Authors: LI Wei E-mail: liwei12@fudan.edu.cn

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	DAI Zibin
	YI Suwen
	LI Wei
	NAN Longmei

Cite this article:

DAI Zibin,YI Suwen,LI Wei等. Research and Design of Efficient Parallel Processing Architecture for Elliptic Curve Cryptographic Processor[J]. JEIT, 2017, 39(10): 2487-2494.

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http://jeit.ie.ac.cn/EN/10.11999/JEIT161380 OR http://jeit.ie.ac.cn/EN/Y2017/V39/I10/2487

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