考虑偏置温度不稳定性的软差错率分析

doi:10.11999/JEIT161113

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Abstract

Under nano-scaled technology, the Integrated Circuit (IC) reliability issues caused by both aging mechanism and soft error become very critical. In this paper, from critical charge and delay points of view, the effects of Bias Temperature Instability (BTI), including Negative BTI (NBTI) and Positive BTI (PBTI), on Soft Error Rate (SER) are analyzed. Firstly, how BTI affects critical charge and delay is focused on. The delay increasing model is derived, and the critical charge changing procedure is introduced. Further, using the derived SER computational model considering critical charge, and mapping the changed delay into electrical mask procedure, the SER is accurately calculated. Experimental results on ISCAS89 benchmark circuits show that, considering two factors of BTI, SER estimation has high accuracy.

Key words： Integrated Circuit (IC) Bias Temperature Instability (BTI) Soft Error Rate (SER) Critical charge value Delay

Received: 20 October 2016 Published: 25 April 2017

PACS:	TN407
	TP391.72

Fund:

The National Natural Science Foundation of China (61432017, 61404092), The Talented People Introduction Foundation of Shanghai University of Electric Power (K-2013-017), The Excellent University Young Teachers Training Program of Shanghai Municipal Education Commission (Z2015-074), The Project of Shanghai Science and Technology Committee Grant (15110500700)

Corresponding Authors: JIANG Jianhui E-mail: jhjiang@tongji.edu.cn

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	WANG Zhen
	JIANG Jianhui
	CHEN Naijin

Cite this article:

WANG Zhen,JIANG Jianhui,CHEN Naijin. Bias Temperature Instability-aware Soft Error Rate Analysis[J]. JEIT, 2017, 39(7): 1640-1645.

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http://jeit.ie.ac.cn/EN/10.11999/JEIT161113 OR http://jeit.ie.ac.cn/EN/Y2017/V39/I7/1640

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