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Other articles related with "TN4":
2186 Wang Lun-yao① ;XiaYin-shui①②; Ye Xi-en①
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1959 Xu Xin-min①; Wang Qian①; Yan Xiao-lang②
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1516 Zhang Ying①; Janet M. Wang②; Xiao Liang①; Wu Hui-zhong①
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1526 Chen Dong-po; He Le-nian; Yan Xiao-lang
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1335 Jiang Jin-guang; Wang Yao-nan
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717 Yuan Dan-shou; Rong Meng-tian
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741 Mei Kui-zhi; Zheng Nan-ning;Liu Yue-hu; Yao Ji; Huang Yu; Wang Yong
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567 Chang Yi-feng; Yang Yin-tang
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380 Wang Pengjun①③; Fang Zhenxian①; Liu Ying②①; Huang Dao③
  Design of Adiabatic Non-integer Division Circuit Based on the 2N-2N2P Structure
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177 Cao Yi; Wang Guang-ming
  Characteristic Research of the Novel 1-D Periodic Defected Ground Structure
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1829 Fang Lei; Zhang Huan-chun; Jing Ya-zhi
  An FPGA Based Adaptive Genetic Algorithm
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1152 Zhou Gan-min①;　 Yang Sheng-guang②;　 Jiang Zhao-yu②;　 Gao Ming-lun①　
  A True Random Number Generator Based on PLL
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1157 Xu Chuan-pei①②;　 Li Zhi①; 　 Mo Wei①　
  Test Generation of Sequential Circuits Based on Ant Algorithm and Genetic Algorithm
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1162 Qiao Lu-feng①②; Wang Zhi-gong①; Huang Bin①; Lu Yuan-lin①　
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    JEIT   2005 Vol.27 (7): 1162-1166 [Abstract] (2138) [HTML 1 KB] [PDF 892 KB] (741)
874 Li Xiao-ming; Shen Hai-bin; Yan Xiao-lang
  Characteristic Analysis of a Chaotic Random Number Generator Using Piece-Wise-Linear Map
    JEIT   2005 Vol.27 (6): 874-878 [Abstract] (2143) [HTML 1 KB] [PDF 1197 KB] (1091)
823 Wu Gui-chu①; Wu Lie①; Chen Xie-xiong②; Hang Guo-qiang②
  Research on Mapping and Simplification of Ternary Function with Mutually Exclusive Variables
    JEIT   2005 Vol.27 (5): 823-826 [Abstract] (1841) [HTML 0 KB] [PDF 876 KB] (700)
651 Zheng Fei-jun; Yan Xiao-lang; Ge Hai-tong; Yang Jun
  Using Boolean Satisfiability for Combinational Equivalence Checking
    JEIT   2005 Vol.27 (4): 651-654 [Abstract] (1766) [HTML 1 KB] [PDF 945 KB] (1137)
334 Wu Xun-wei①; Wang Peng-jun①; Shen Yan-fei②
  Novel CMOS JK Flip-Flop
    JEIT   2005 Vol.27 (2): 334-336 [Abstract] (1879) [HTML 1 KB] [PDF 691 KB] (1104)
139 Jing Ming-e; Hao Yue; Ma Pei-jun
  The Coupling Technique for IC’s Centering Design and Tolerance Optimization
    JEIT   2005 Vol.27 (1): 139-142 [Abstract] (1939) [HTML 1 KB] [PDF 901 KB] (785)
1325 Shen Ji-zhong; Shao Zhi-long; Jiang Zheng-ke
  Design of Low Voltage Low Power Current-Mode CMOS Circuits Based on Parallel Switches
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1082 Wang Bin; Yao Qing-dong; Liu Peng; Zhang Ming; Wei Xiao-dong
  The Hardware/Software Co-design of Audio Decoding Used in HDTV
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645 Sun Xiu-bin; Chen Guang-ju; Xie Yong-le
  Test Point Selection for Analog Integrated Circuit
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1230 Qiao Shijie①; Zhi Guilian②; Wang Guoyu③
  Remote surveillance system based on wavelet image coding
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865 Dai Lirong; Wang Renhua
  An embedded Chinese text-to-speech system based on dsp and its VLSI design scheme
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254 Han Qi; Zheng Jiang; Jia Wei
  Interface-based IP module design reuse methodology
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    JEIT   2003 Vol.25 (1): 128-130 [Abstract] (1599) [HTML 1 KB] [PDF 453 KB] (896)
280 Lno Feng; Wu Shunjun; Song Wanjie
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1236 Song Ben; Chen Xiaoding; Hong Wei
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181 Wu Xin①; Qian Zhaoming①; Pang Minxi②
  STUDY IN ELECTROMAGNETIC COMPATIBILITY ON PRINTED CIRCUIT BOARD OF SWITCHING POWER SUPPLY
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75 Chen Xiexiong; Wu Xunwei; Shen Jizhong; Cheng Jie
  ALGEBRAIC THEORY FOR HYBRID CMOS MULTIVALUED CIRCUITS
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