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An FPGA Based Adaptive Genetic Algorithm |
Fang Lei; Zhang Huan-chun; Jing Ya-zhi |
College. of Automation Eng. , Nanjing University of Aeronautics & Astronautics, Nanjing 210016, China |
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Abstract A hardware implement Adaptive Genetic Algorithm (AGA) is proposed in this paper. The adaptive algorithm uses three parameters, i. e. fmax , fmin and fave to determine the fc and fm of the whole generation adaptively. The selection , crossover and mutation operators which are suitable for hardware implement are selected and they are designed in a pipelining architecture . The parallelism of the selection operator and the computation of the fitness of the individual enhance the efficiency of the algorithm greatly. The hardware GA processor has been implemented in XILINX FPGA(Field Programmable Gate Arrays) XC2V1000. The VHDL language is used to describe the whole algorithm. Experimental results indicate that the adaptive genetic algorithm improves the global convergence and search performance of the algorithm greatly. The hardware implementation of the algorithm reduces the running time efficiently and makes it possible to apply in time-critical systems.
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Received: 15 May 2004
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[1] |
LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. JEIT, 2017, 39(1): 245-249. |
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