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| A Novel High-speed Delay-independent Asynchronous to Synchronous Communication Interface |
| Peng Yao① Zhou Duan② Yang Yin-tang① Zhu Zhang-ming① |
①(Institute of Microelectronics, Xidian University, Xi’an 710071, China)
②(School of Computer Science and Technology, Xidian University, Xi’an 710071, China) |
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Abstract This paper proposes a novel delay-independent communication interface used in multiprocessor System- on-Chip (SoC) and Network-on-Chip (NoC). Data can be transferred fast from asynchronous to synchronous through the interface gracefully, which is implemented by the circular FIFO handled under special operation protocol, and various asynchronous transfer protocols are supported. Meanwhile, the communication integrity and high throughput are maintained during transmission. Simulations are made based on SMIC 0.18 μm CMOS technology. Results show that the delay is 792 ps with the average energy consumption of 4.87 pJ/request, which can satisfy the requirements of high speed low power, strong robustness and good reusability in Multiprocessor SoC and NoC.
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Received: 09 July 2010
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Corresponding Authors:
Peng Yao
E-mail: xyyiezi@163.com
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2011, Vol. 33 
