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Conflict-free Access Mechanism and “Bit Identifying” Technique Research of Reconfigurable Memories |
Yang Jin-lin①② Yang Hai-gang① |
①(Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China)
②(Graduate University of Chinese Academy of Sciences, Beijing 100039, China) |
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Abstract This paper analyzes emphatically the read-write conflict mechanism of reconfigurable memory, and reveals the relations of address conflict, readout mapping and routing of memory under reconfigurable condition. Besides, the paper presents a “bit identifying” method for achieving the high-powered conflict-free reconfigurable memory. Buffering the writing operations and adding identifying bits for input data when the conflict occurs, the identifying bits use for controlling the data to input to memory core or output to memory. Comparing with another method, the experiment results of verifying in 0.13-μm and 0.18-μm mainstream CMOS technologies show obvious advantages: area decreases about 11%; speed increases about 21%. This technology has been applied into a homemade million-gate FPGA device, and testing results show it have achieved the conflict-free purpose.
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Received: 11 May 2010
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Corresponding Authors:
Yang Hai-gang
E-mail: yanghg@mail.ie.ac.cn
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[1] |
LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. JEIT, 2017, 39(1): 245-249. |
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