|
|
|
| Design of 16 bit Low-Voltage Low-Power ΣΔ Modulator with Standard Digital Technology |
| Yin Shu-juan,Li Xiang-yu,Sun Yi-he |
| National Laboratory of Information and Technology, Tsinghua University, Beijing 100084, China |
|
|
|
|
Abstract For audio signals with input frequency between 20 Hz and 24 kHz, a switch-capacitor feed-forward ΣΔ A/D modulator in 0.18μm Logic technology is proposed in this paper, which gains 16 bit resolution with 1.2 V supply voltage. The modulator can achieve 102.2 dB signal-to-noise ratio (SNR) under 6MHz sample clock, and the total power dissipation is only 2.46 mW. In the modulator, a pseudo-two-stage Class-AB transconductance amplifier is used, which has high slew rate and open loop gain while without increasing power dissipation. What is more, full compensated depletion-mode capacitors are used as sample capacitors and integrating capacitors to enable the whole chip to be fabricated in standard digital technology, which is good to reduce chip cost and improve the modulators’ compatibility in technology. Compared with other low-power low-voltage ΣΔ A/D modulators reported, this design has better FOM (Figure Of Merit).
|
|
Received: 21 January 2009
|
|
|
|
Corresponding Authors:
Yin Shu-juan
|
|
|
|
|
|
|
2010, Vol. 32 
