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| Low Power Clock-Gating Method and Its Applications in SAR Real-Time Processor |
| Chen Bing-bing①; Shao Jie②; Wang Zhen-song①; Zhao Rong-cai③ |
| ①Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China;②Beijing Remote Sensing Information Institute Beijing 100085 China;③PLA Information & Engineering University Zhengzhou 450002 China |
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Abstract Power consumption has to be taken into consideration in an applied SAR real-time processor. The power consumption is measured before and after clock-gating method had been applied to DSP, SBSRAM and FPGA of an air-borne SAR real-time preprocessor board respectively by software. It has been proved that clock-gating method is feasible for low power design in the SAR especially the future space-borne SAR real-time processor.
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Received: 10 November 2003
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2005, Vol. 27 
