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| Implementation of Folded-Cascode OTA’s MST State via Clock Feedthrough Frequency Compensation |
| Wang Xiang-zhan; Ning Ning; Yu Qi; Dai Guang-hao; Yang Mo-hua |
| University of Electronic Science & Technology of China, Chengdu 610054, China |
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Abstract In this article, a novel Clock Feedthrough Frequency Compensation (CFFC) method based on the Minimum-Settling-Time (MST) theory and step-response analysis of a second order system is presented. Cadence ADE simulation results of a folded-cascode OTA with CFFC designed with SMIC 0.35µm 2P3M Polyside Si CMOS models show that the settling time of the CFFC compensated cascode OTA is reduced by 22.7%, MST state is obtained as well. With the capacitor load varies from 0.5pF to 2.5pF, the settling time changes linearly from 3.62ns to 4.46ns, and the circuit achieves MST state at each load value. This method can be applied to high-speed active switched capacitor networks and its related fields.
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Received: 10 October 2005
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2007, Vol. 29 
