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| Study on Implementation of Traceback Algorithm in Viterbi Decoders |
| Wang Jian-xin; Yu Gui-zhi |
| School of Electronic Engineering & Optoelectronic Technology, NUST, Nanjing 210094, China |
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Abstract This paper discusses two traceback algorithms for Viterbi decoder. The realization methods for the traceback algorithms with FPGA are given through optimization for the hardware architecture. The comparison between the two realization methods is given. Finally, the two realization methods are applied to Viterbi decoder, and both simulation and hardware test show that the presented implementation methods are correct.
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Received: 30 May 2005
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| [1] |
LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. JEIT, 2017, 39(1): 245-249. |
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2007, Vol. 29 
