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| Fully Distributed Fault Tolerant Scheduling for Onboard Clos-network Switching |
| LIU Kai①③ YAN Jian② GAO Xiaolin①④ LU Jianhua① |
①(Department of Electronic Engineering, Tsinghua University, Beijing 100084, China)
②(Tsinghua Space Center, Tsinghua University, Beijing 100084, China)
③(Graduate School at Shenzhen, Tsinghua University, Shenzhen 518055, China)
④(Beijing Aerospace Control Center, Beijing 100094, China) |
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Abstract For an onboard switching, serious decline in the reliability is induced by the harsh space radiation environment. In this paper, a 3-stage Clos-network supporting fully distributed scheduling and a Fully Distributed Fault Tolerant (FDFT) scheduling algorithm are proposed to improve fault-tolerant ability of an onboard switching. Combined input and output queued architecture is employed in the central and output stages of the proposed Clos-network to support fully distributed scheduling in both the network and switching elements. In FDFT, a distributed fault detection algorithm is employed to obtain the crosspoint fault information. Based on the analysis of the influence of the faults, a fault-tolerant cell dispatching algorithm is proposed in the input stage which achieves load-balancing to fault-free paths. Theoretical analysis demonstrates that 100% throughput is achieved when no more than (m-n) crosspoint faults occur in any input/output module or in all central modules, where m and n are the number of inputs and outputs of input module, respectively. Furthermore, simulation results indicate that, in the case of faults occurring randomly, FDFT tolerates much more faults, and exhibits a good performance in terms of throughput and average cell delay under different traffic scenarios.
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Received: 19 August 2015
Published: 14 March 2016
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| Fund: The National Natural Science Foundation of China (91338108, 91438206), China Electronics Technology Group School-Enterprise Cooperation Foundation (Key Technology of Space Internet) |
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Corresponding Authors:
YAN Jian
E-mail: yanjian_ee@tsinghua.edu.cn
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| [1] |
BOTTA A and PESCAPE A. On the performance of new generation satellite broadband internet services[J]. IEEE Communications Magazine, 2014, 52(6): 202-209. doi: 10.1109/MCOM.2014.6829965.
|
| [2] |
JAFF E, PILLAI P, and HU Y. IP multicast receiver mobility support using PMIPv6 in a global satellite network[J]. IEEE Communications Magazine, 2015, 53(3): 30-37. doi: 10.1109/ MCOM.2015.7060479.
|
| [3] |
COURVILLE N, BISCHI H, and ZENG J. Critical issues of onboard switching in DVB-S/RCS broadband satellite networks[J]. IEEE Wireless Communications, 2005, 12(5): 28-36. doi: 10.1109/MWC.2005.1522101.
|
| [4] |
SIEGLE F, VLADIMIROVA T, ILSTAD J, et al. Mitigation of radiation effects in SRAM-based FPGAs for space applications[J]. ACM Computing Surveys, 2015, 47(2): 37:1-37:34. doi: 10.1145/2671181.
|
| [5] |
张茂森, 邱智亮, 高雅, 等. 星上Clos 交换网络的分治调度算法[J]. 电子与信息学报, 2012, 34(11): 2734-2740. doi: 10.3724/SP.J.1146.2012.00553.
|
|
ZHANG M, QIU Z, GAO Y, et al. Divide-and-conquer dispatching scheme for satellite clos-network switches[J]. Journal of Electronics & Information Technology, 2012, 34(11): 2734-2740. doi: 10.3724/SP.J.1146.2012.00553.
|
| [6] |
KAO Y H and CHAO H J. Design of a bufferless photonic clos network-on-chip architecture[J]. IEEE Transactions on Computers, 2014, 63(3): 764-776. doi: 10.1109/TC.2012.250.
|
| [7] |
YANG Y and WANG J. A fault-tolerant rearrangeable permutation network[J]. IEEE Transactions on Computer, 2004, 53(4): 414-426. doi: 10.1109/TC.2004.1268399.
|
| [8] |
GAO Y, QIU Z, ZHANG M, et al. Distributed weight matching dispatching scheme in MSM clos-network packet switches[J]. IEEE Communications Letters, 2013, 17(3): 580-583. doi: 10.1109/LCOMM.2013.012213.122552.
|
| [9] |
高雅, 邱智亮, 张茂森, 等. 基于帧填补的MMM Clos 网络按序分组交换算法[J]. 电子与信息学报, 2012, 34(11): 2715-2720. doi: 10.3724/SP.J.1146.2012.00617.
|
|
GAO Y, QIU Z, ZHANG M, et al. Padded-frame based in-sequence dispatching scheme for memory-memory-memory (MMM) clos-network[J]. Journal of Electronics & Information Technology, 2012, 34(11): 2715-2720. doi: 10. 3724/SP.J.1146.2012.00617.
|
| [10] |
杨君刚, 刘增基, 雒晓卓. 一种新型的三级Clos网络分布式容错调度机制[J]. 解放军理工大学学报: 自然科学版, 2011, 12(3): 217-222.
|
|
YANG J, LIU Z, and LUO X. New distributed fault tolerance scheduling algorithm in three-stage clos network[J]. Journal of PLA University of Science and Technology (Natural Science Edition), 2011, 12(3): 217-222.
|
| [11] |
LI X, ZHOU Z, and HAMDI M. Space-memory-memory architecture for clos-network packet switches[C]. Proceedings of IEEE International Conference on Communications, Seoul, 2005, (2): 1031-1035. doi: 10.1109/ICC.2005.1494505.
|
| [12] |
YU H, RUEPP S, and BERGER M S. Out-of-sequence prevention for multicast input-queuing space-memory- memory clos-network[J]. IEEE Communications Letters, 2011, 15(7): 761-763. doi: 10.1109/LCOMM.2011.051011. 102535.
|
| [13] |
KLEBAN J and SUSZYNSKA U. Static dispatching with internal backpressure scheme for SMM clos-network switches [C]. Proceedings of IEEE Symposium on Computers and Communications, Madeira, 2013: 654-658. doi: 10.1109/ ISCC.2013.6755022.
|
| [14] |
ZHANG M, QIU Z, and GAO Y. Space-memory-memory clos-network switches with in-sequence service[J]. IET Communications, 2014, 8(16): 2825-2833. doi: 10.1049/iet- com.2013.0844.
|
| [15] |
ROJAS-CESSA R, OKI E, JING Z, et al. CIXB-1: combined input-one-cell-crosspoint buffered switch[C]. Proceedings of IEEE Workshop on High Performance Switching and Routing, Dallas, 2001: 324-329. doi: 10.1109/HPSR.2001.923655.
|
| [16] |
MCKEOWN N. The iSLIP scheduling algorithm for input- queued switches[J]. IEEE/ACM Transactions on Networking, 1999, 7(2): 188-201. doi: 10.1109/90.769767.
|
|
|
|
