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| Hardware-efficient Parallel Structures for Linear-phase FIR Digital Filter Based on Iterated Short Convolution Algorithm |
| Tian Jing-jing① Li Guang-jun① Li Qiang①② |
①(School of Communication and Information Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China)
②(Department of Engineering, Aarhus University, Aarhus DK-8000, Denmark) |
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Abstract Based on fast convolution algorithm, improved parallel FIR filter structures are proposed for linear- phase FIR filters where the number of taps is a multiple of parallelism. The proposed parallel FIR structures not only use fast convolution algorithm to reduce the number of sub-filters, but also exploit the symmetric coefficients of linear-phase FIR filter to reduce half the number of multiplications in sub-filter section at the expense of additional adders in pre-processing and post-processing blocks. The proposed parallel FIR structures save a large amount of hardware cost for symmetric coefficients from the reported parallel FIR filter structures, especially when the length of the filter is large. Specifically, for a 4-parallel 144-tap filter, the proposed structure saves 36 multipliers (14.3%), 23 adders (6.6%), and 35 delay elements (11.0%) from the improved Fast FIR Algorithm (FFA) structure.
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Received: 08 July 2013
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Corresponding Authors:
Tian Jing-jing
E-mail: jing.jing.t@163.com
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2014, Vol. 36 
