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| Power Analysis Security Evaluation on Piccolo Based on FPGA Platform |
| Wang Chen-xu①② Li Jing-hu② Yu Ming-yan①② Wang Jin-xiang① |
①(Microelectronics Center, Harbin Institute of Technology, Harbin 150001, China)
②(Microelectronics Center, Harbin Institute of Technology, Weihai 264209, China) |
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Abstract To evaluate Piccolo’s security against Power Analysis Attack (PAA), a cipher text attack model is proposed and Correlation Power Analysis (CPA) is conducted on this cipher implementation with measured power traces based on Side-channel Attack Standard Evaluation BOard (SASEBO). Due to the whiten keys for the final round of Piccolo, attacked keys including RK24L, RK24R, WK2 and WK3 are divided into four sub-keys, which are disclosed one by one. This approach can reduce the 80-bit primary key search space from 280 to (2×220+2×212+216) and make it possible to recover the primary key. The attack results show that 3000 measured power traces are enough to recover Piccolo’s 80-bit primary key, which proves the attack model’s feasibility and Piccolo’s vulnerability to CPA against its hardware implementation. So, some countermeasures should be used for Piccolo’s hardware implementation.
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Received: 06 February 2013
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Corresponding Authors:
Wang Chen-xu
E-mail: wangchenxu@hit.edu.cn
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2014, Vol. 36 
