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A Hardware Acceleration Based Algorithm for Real-time Binary Image Connected-component Labeling |
Zhao Fei Zhang Lu Zhang Zhi-yong Lu Huan-zhang |
National Key Laboratory of Automatic Target Recognition (ATR), National University of Defense Technology, Changsha 410073, China |
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Abstract Due to the requirement for real-time image processing in optical imaging homing weapon systems, this paper proposes a hardware acceleration based connected-component labeling algorithm, which is a real time and two-pass algorithm. The algorithm integrates the merit of pixel-based and the run-based algorithm, which sets pixel as scan unit and line as label unit. Tree-shape topology is constructed in the first scan process, and lines are exported as the results. Then the labels are replaced in the second scan process to complete the connected-component labeling. Experiments on DSP+FPGA platform demonstrate that the hardware acceleration implementation of algorithm reaches a higher performance and efficiency with less resources consumption, and meet the demand of real-time processing.
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Received: 28 July 2010
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Corresponding Authors:
Zhao Fei
E-mail: f_z2010@126.com
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