用DSP实现相参处理器I/Q通道幅相误差自动校正

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Abstract This paper describes the implementation of the corrector of I & Q errors in coherent processor. The correcting network consists of combination logic circuit and it can correct the gain and phase imbalances and the bias errors of the in-phase and quadrature channels in coherent signal processing. The correcting coefficients are computed with DSP using a test signal. The image level without correction is about -27dB if the errors of gain and phase in the coherent processor are 0.1dB and 5° respectively. The experimental results show that the image level is reduced to -52dB from -27dB after correcting the errors.

Key words： DSP Coherent signal processing Correcting errors

Received: 09 April 1998

PACS:

TN911.72

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	Zhang Xinggan
	Zhu Zhaoda

Cite this article:

Zhang Xinggan,Zhu Zhaoda. IMPLEMENTATION OF THE CORRECTOR OF ERRORS IN I & Q CHANNELS WITH DSP[J]. , 1999, 21(3): 311-314 .

URL:

http://jeit.ie.ac.cn/EN/ OR http://jeit.ie.ac.cn/EN/Y1999/V21/I3/311