|
|
High-Performance Architecture of Deblocking Filter for AVS Video Coding |
Fang Jian①; Ling Bo②; Wang Kuang② |
①Zhejiang University City College, Hangzhou 310015, China;②Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China |
|
|
Abstract In the video decoder for AVS, deblocking filter becomes one of the bottom necks for real-time processing. An implement architecture for deblocking filter is proposed in this paper. With a novel filtering order, the unfiltered data storage is reduced to a 16×8 block instead of whole 16×16 macroblock。With data reuse strategy, the intermediate data storage is also reduced efficiently. The experiment shows the proposed design can achieve 50 MHz with only gate count of 9.2k by using 0.18μm CMOS technology. When clocked at 50MHz, the proposed design can support real-time deblocking of HD1080 (1980×1088@30Hz) video application.
|
Received: 10 September 2007
|
|
|
|
|
|
|
|