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| Partial Scan Design Based on Circuit State Information and Conflict Analysis |
| Xiang Dong; Liu Xin; Xu Yi |
| Institute of Microelectronics Tsinghua University Beijing 100084 China |
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Abstract A multiple phase partial scan design method that breaks critical cycles using a combination of valid circuit state information and conflict analysis is proposed. It is quite cost-effective to obtain circuit state information via logic simulation, therefore, circuit state information is iteratively updated after a given number of partial scan flip-fiops being selected. When all critical cycles in the circuit are broken, our method turns to the con-flict resolution process using an intensive conflict-analysis-based testability measure conflict rather than reducing the sequential depth. The proposed method tries to eliminate the con-flicts and uses a conflict-analysis-based testability measure conflict. Sufficient experimental results are presented to validate the method.
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Received: 14 August 2002
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2004, Vol. 26 
