Adaptive Voltage Scaling Technique for DC-DC Converter Based on Pulse Skip Modulation
WANG Dongjun LUO Ping PENG Xuanlin ZHEN Shaowei HE Yajuan
(State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China)
In order to decrease energy consumption of digital circuits by reducing the supply voltage, an Adaptive Voltage Scaling (AVS) for DC-DC converter based on Pulse Skip Modulation (PSM) is proposed. The AVS technique can scale supply voltage adaptively by probing and tracking the Critical Path Replica (CPR) delay time. To improve the output voltage ripple and efficiency of converter especially in light load, the PSM with Adaptive ratio duty (APSM) also is used. The experimental results show that the output voltage is well regulated from 0.6~ 1.5 V when the operation frequency of load varies within the range of 30~150 MHz. The maximum energy saving of 83% is obtained with the proposed converter compared to the traditional fixed voltage.
王东俊,罗萍,彭宣霖,甄少伟,贺雅娟. 基于脉冲跨周期调制的DC-DC变换器自适应电压调节技术[J]. 电子与信息学报, 2017, 39(1): 213-220.
WANG Dongjun, LUO Ping, PENG Xuanlin, ZHEN Shaowei, HE Yajuan. Adaptive Voltage Scaling Technique for DC-DC Converter Based on Pulse Skip Modulation. JEIT, 2017, 39(1): 213-220.
KONIJNENBURG M, STANZIONE S, YAN L,?et al. A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG[C]. IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2016: 480-481.
[2]
DINI Michele, ROMANI Aldo, FILIPPI Mtteo, et al. A nanocurrent power management IC for low-voltage energy harvesting sources[J]. IEEE Transactions on Power Electronics, 2016, 31(6): 4292-4304.
[3]
JOSE Luis and NUNEZ Yanez. Adaptive voltage scaling with in-situ detectors in commercial FPGAs[J]. IEEE Transactions on Computers, 2015, 64(1): 45-53. doi: 10.1109/ TC.2014.2365963.
[4]
DANCY A P, AMIRTHARAJAH R, and CHANDRAKASAN A P. High-efficiency multiple-output DC-DC conversion for low-voltage systems[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000, 8(3): 252-263. doi: 10.1109/92.845892.
[5]
ZHEN Shaowei, LUO Ping, and ZHANG Bo. Design of highly integrated power management unit with dual DVS-enabled regulators[J]. Analog Integrated Circuits and Signal Processing, 2014, 80: 209-220. doi: 10.1007/s10470-014-0313- 1.
[6]
WIRNSHOFER M, HEIβ L, GEORGAKOS G, et al. A variation-aware adaptive voltage scaling technique based on in-siut delay monitoring[C]. IEEE 14th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cottbus, Germany, 2011: 261-266.
[7]
LUO Ping, FU Songlin, ZHANG Xiang, et al. An adaptive voltage scaling circuits based on dominate pole compensation [C]. Processing 11th IEEE International Conference on ASIC, Chengdu, China, 2015: 1-4.
[8]
CHO M, KIM S, TOKUNAGA C,?et al. Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating [C].?IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2016: 152-153.
[9]
ELGEBALY M and SACHDEV M. Variation-aware adaptive voltage scaling system[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007, 15(5): 560-571. doi: 10.1109/TVLSI.2007.896909.
[10]
IKENAGA Y, NOMURA M, SUENAGA S, et al. A 27% active-power-reduced 40-nm CMOS multimedia SoC with adaptive voltage scaling using distributed universal delay lines[J]. IEEE Journal of Solid-State Circuits, 2012, 47(4): 832-840. doi: 10.1109/JSSC.2012.2185340.
[11]
KAPAT S, BANERJEE S, and PATRA A. Discontinuous map analysis of a DC-DC converter governed by pulse skipping modulation[J]. IEEE Transactions on Circuits and System I, 2010, 57(7): 1793-1801. doi: 10.1109/TCSI.2009. 2034888.
[12]
LIOU W R, YEH M L, and KUO Y L. A high efficiency Dual-Mode buck converter IC for portable applications[J]. IEEE Transactions on Power Electronics, 2008, 23(2): 667-677. doi: 101109/TPEL.2007.915047.
[13]
LUO Ping, LI Zhaoji, and ZHANG Bo. A novel improved PSM model in DCDC converter based on energy balance[C]. 37th IEEE Power Electronics Specialists Conference, Jeju, South Korea, 2006: 1-4.
[14]
KAPAT S, MANDI B C, and PATRA A. Voltage-mode digital pulse skipping control of a DC-DC converter with stable periodic behavior and improved light-load efficiency[J]. IEEE Transactions on Power Electronics, 2016, 31(4): 3372-3379. doi: 10.1109/TPEL.2015.2455553.
LUO Ping, LI Zhaoji, XIONG Fugui, et al. Pulse-cycle skip modulation in switching converter[J]. Journal of Electronics & Information Technology, 2004, 26(6): 984-988.
NIU Quanmin, LUO Ping, LI Zhaoji, et al. Space state average model of PSM in boost converter[J]. Journal of Electronics & Information Technology, 2006, 28(10): 1955-1958.
LI Hangbiao, ZHANG Bo, LUO Ping, et al. Pulse skip with adaptive duty ratio control technique for switching DC-DC converter[J]. Journal of Electronics & Information Technology, 2014, 36(9): 2265-2271. doi: 10.3724/SP.J.1146. 2013.01693.
[18]
LI Hangbiao, ZHANG Bo, LUO Ping, et al. Adaptive duty ratio modulation technique in switching DC-DC converter operating in discontinuous conduction mode[J]. Analog Integrated Circuits and Signal Processing, 2014, 78(2): 361-371. doi: 10.1007/s10470-015-0603-2.
[19]
WEI G Y and HOROWITZ M. A fully digital energy-efficient adaptive power supply regulator[J]. IEEE Journal of Solid-State Circuits, 1999, 34(4): 520-528. doi: 10.1109/ 4.753685.
[20]
CALHOUN B H, WANG A, and CHANDRAKASAN A. Model and sizing for minimum energy operation in subthreshold circuits[J]. IEEE Journal of Solid-State Circuits, 2005, 40(9): 1778-1786. doi: 10.1109/JSSC.2005.852162.
