FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor
LIANG Huaguo① SUN Hongyun① SUN Jun① HUANG Zhengfeng① XU Xiumin① YI Maoxiang① OUYANG Yiming② LU Yingchun① YAN Aibin②
①(School of Electronic Science & Applied Physics, Hefei University of Technology, Hefei 230009,China) ②(School of Computer & Information, Hefei University of Technology, Hefei 230009,China)
In order to quickly and automatically analyze the soft error sensitivity for microprocessors, a soft error sensitivity analysis method using FPGA-based fault injection is proposed. The fault and fault-free microprocessors on a FPGA are board run simultaneously. Moreover, a fault injection controller, a fault classification module and a fault list module are also implemented on the hardware. The method inherits the parallelism of the FPGA and achieves a fast and automatical fault injection for all storage bits. Further, using a PIC16F54 microprocessor as experimental subject, approximate 300, 000 soft errors are injected into the microprocessors to analyze its soft error sensitivity. In order to demonstrate the sensitivity evaluation efficiency of the method, the quite sensitive storage cells are hardened and the sensitivity is analyzed again. Compared to the simulation approach, experimental results show that the proposed technique achieves four orders of magnitude speedup.
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