Reconfigurable cipher stream architecture is a newly proposed architecture for cipher processing, but poor Very Large Instruction Word (VLIW) code density and huge Kernel level code cubage are always serious problems on this architecture. Through analyzing the characteristics of a series of cryptographic algorithms on Stream based Reconfiguable Clustered block Cipher Processing Array (S-RCCPA) architecture, a reconfigurable VLIW dynamically technology is proposed, and the corresponding Kernel level instruction set and hardware circuit structure are designed. The experiments demonstrate that this technology can reduce VLIW width, thus improve the instruction density of VLIW effectively. Meanwhile, it can reduce about 33% of the Kernel volume, and depress the microcode store capacity from 96 kB to 64 kB. Thus it can also reduce the whole area and power consumption of chip respectively.
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