A circuit characteristics-driven semi-supervised modelling approach is proposed for FPGA architecture design space exploration. By including circuit characteristics as input, the proposed approach can estimate the performance of specific circuit on certain architecture accurately. Experimental results illustrate that the approach estimates the area with Mean Relative Error (MRE) up to 6.25%, and delay up to 4.23%, which is comparable to the Semi-supervised Model Tree (SMT) approach. Meanwhile, the proposed approach speedups the modelling process. Compared to the SMT approach, the proposed approach reduces the time cost from 500 h to 250 h when exploring a design space with millions of architectures inside on Intel Xeon E7-4807 platform.
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