An Efficient Reliability Estimation Method for Gate-level Circuit
Cai Shuo①② Kuang Ji-shun① Liu Tie-qiao① Zhou Ying-bo①
①(School of Information Science and Engineering, Hunan University, Changsha 410082, China) ②(School of Computer and Communication Engineering, Changsha University of Science and Technology, Changsha 410004, China)
Abstract：With the development of semiconductor technologies and integration of chips, soft errors become the key factor influencing circuit reliability. In order to estimate the effects of soft errors, a reliability calculation method of gate-level circuit based on signals’ probability is proposed. All signals’ probabilities under soft errors are calculated first, and then the whole reliability is estimated using fault simulation. The proposed method is compared with the probabilistic transfer matrix approach and benchmark circuit experiments are finished, results show the method has the same accuracy as the Probabilistic Transfer Matrix (PTM) approach, but it needs shorter time and less space, especially suitable for calculation of reliability under specific vector and random vectors.
2013, Vol. 35 
