Evolutionary Design of Polymorphic Self-checking Circuits Based on Inputs Decomposition and Outputs Matching
Bai Lei① Yan Lu② Wang Ke-rang① Zhu Xiao-hua①
①(School of Electronic Engineering and Optoelectronic Technology, Nanjing University of Science and Technology, Nanjing 210094, China) ②(Nanjing LES Information Technology Company Limited, Nanjing 210007, China)
Abstract：To solve the problem of scalability in designing polymorphic self-checking circuits using evolutionary design, a new method based on inputs decomposition and outputs matching is proposed. The system is decomposed into evolvable part and fixed part，and the number of input-output combinations can be decreased by decomposing the inputs of the system, thus the complexity of evolution is reduced. The NOT gate is added to outputs of the candidate circuits when the matching degree of the outputs is lower than 1/2 compared with desired outputs in the stage of fitness evaluation. The fitness as well as the diversity of the population is increased, and the optimum structure is protected from being eliminated. The evolutionary design experiments for two kind of self-checking adders are conducted by combining the polymorphic gates with ordinary gates. The results show that the generation of evolution is decreased by 47.9% and 89.1% while the fault coverage of single test vector is decreased by 75.7% and 79.7% compared with conventional method in designing polymorphic self-checking circuits. The proposed method enjoys advantages of faster convergence, better scalability and higher fault coverage.
柏磊, 严璐, 王克让, 朱晓华. 基于输入分解输出匹配的多态自检电路进化设计[J]. 电子与信息学报, 2012, 34(6): 1494-1500.
Bai Lei, Yan Lu, Wang Ke-Rang, Zhu Xiao-Hua. Evolutionary Design of Polymorphic Self-checking Circuits Based on Inputs Decomposition and Outputs Matching. , 2012, 34(6): 1494-1500.
2012, Vol. 34 
