Abstract:A novel design method for hardware-efficient digital interpolation filter applied to stereo audio Sigma- Delta Digital-to-Analog Converter (Σ-Δ DAC) is proposed in this paper. The method proclaims a new structure of multiplexing the interpolation filter by the left and right channel. The reorder technique is presented to keep the two channels being completely synchronization after multiplexing. The design is fabricated on TSMC 0.18 μm 1.8 V/3.3 V 1P5M CMOS process. The measurement results show that the DAC achieves 106 dB SNR over the 20 kHz audio band. The digital part of chip occupies only 0.198 mm2 and dissipates only 0.65 mW power. This design method benefits low chip area and power consumption and leaves much more design margin to the analog part of the Σ-Δ DAC, which provides important significance in mixed-signal system design.