Scheme of Fast Self-Calibration for a FPGA Chip Clock Generator
Dong Fang-yuan①②; Yang Hai-gang①; Wei Yuan-feng①
①Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China; ②Graduate University of theChinese Academy of Sciences, Beijing 100039, China
Abstract:This paper presents a novel PLL self-calibration scheme based on Frequency-to-Voltage (F2V) Converting technique, which is fast and applicable for the Phase-Locked Loop(PLL) using a multi-band ring Voltage Controlled Oscillator (VCO) in the clock generation module of a FPGA device. Designs of key modules in the self-calibration circuit are detailed, and simulation of the full system is performed. Simulation results indicate that the system can self-calibrate quickly and properly in case of process variation or reference frequency switch. The clock generator using the proposed self-calibration circuit can obtain a wide frequency operating range while maintaining a relatively low VCO gain and it locks fast, as make it suitable for FPGA clock generation.