Abstract:This paper describes the implementation of the corrector of I & Q errors in coherent processor. The correcting network consists of combination logic circuit and it can correct the gain and phase imbalances and the bias errors of the in-phase and quadrature channels in coherent signal processing. The correcting coefficients are computed with DSP using a test signal. The image level without correction is about -27dB if the errors of gain and phase in the coherent processor are 0.1dB and 5° respectively. The experimental results show that the
image level is reduced to -52dB from -27dB after correcting the errors.
张兴敢; 朱兆达. 用DSP实现相参处理器I/Q通道幅相误差自动校正[J]. 电子与信息学报, 1999, 21(3): 311-314 .
Zhang Xinggan; Zhu Zhaoda. IMPLEMENTATION OF THE CORRECTOR OF ERRORS IN I & Q CHANNELS WITH DSP. , 1999, 21(3): 311-314 .