Abstract:A high order all digital phase locked loop with tandem structure is presented. A 2-order all digital PLL is implemented and its performance is verified by simulation. An example is given for SDH 2048Kb/s tributary recovery. Its performances are simulated and compared with the theoretical analysis.
史富强; 林孝康; 冯重熙. 一种级联结构的高阶全数字锁相环[J]. 电子与信息学报, 1999, 21(5): 640-645 .
Shi Fujiang; Lin Xiaokang; Feng Zhongxi. A HIGH ORDER ALL DIGITAL PHASE LOCKED LOOP WITH TANDEM STRUCTURE. , 1999, 21(5): 640-645 .